For some advanced analog or digital logic-complementary metal-oxide-semiconductor (CMOS) devices, capacitors can be built using the polysilicon gate level as the bottom plate, with the top plate material layer comprising a diffusion barrier metal such as Ti, TiN, or TaN, that is below the metal stack. Etching contacts through a dielectric layer to reach the top plate and the bottom plate of the capacitor involve different depth contacts, which is generally handled using a single contact mask level.